menu

Terms & Concept Cards Here
Circuits

The following diagrams were drawn with Digital. Feel free to download it to test the circuits directly.

Gates
NOTANDORXORNANDNOR
AB
00100011
01X01110
10001110
11X11000
RS Flip Flops

Basic reset set flip flop to save bit data; a clock can be connected to the inputs of both nor gates for synchronization

RSQQ'Result
00QQ'No Change
0110Set
1001Reset
1111Avoid
D latch

An addition to the RS flip flop to accept a single input. Together with the clock (E), the input (D) directly changes the output of the latch. This also eliminates the Reset = 1 & Set = 1 issue.

EDQQ'Result
00QQ'Latch
01QQ'Latch
1001Reset
1111Set
JK Flip Flop

JK flip flops cycle at half the speed of its input, as only one SR flip flop is enabled at a time and it takes two clicks to pass data to the output.

JKQQ'Result
00QQ'Unchanged
0101Reset
1010Set
11Q'QToggle
Multiplexer

Takes many input signals and a selector address with its own signals. Selector address chooses which of the input signals to output (by index).

ABY
00D0
01D1
10D2
11D3
Half Adder

Adds two bits and returns the sum and carry; used for the least significant digit of numerical additions

Full Adder

Adds three bits (includes carry) together and produces a sum and carry; can be strung together to add numbers with many digits.